Abstract: Recently, there has been a strong drive to replace established analog circuits for multi-gigabit clock and data recovery (CDR) by more digital solutions. We focused on phase locked ...
Abstract: An all-digital spread-spectrum clock generator (SSCG) has been fabricated in a 0.18 mum CMOS process. The analysis and design of this all-digital SSCG is presented. A mixed-signal phase and ...
Some results have been hidden because they may be inaccessible to you
Show inaccessible results